Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
1544
Datasheet
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
u
nus
ed
_
csi1_int_s
tatus
er
r_
line_sync
err_e
scap
e
er
r_data_ti
m
eout
er
r_
fr
am
e_d
ata
err_fr
ame
_
sync
err_id
err
_
crc
no_e
cc_e
rr
err_e
cc_c
o
rr
err_e
cc_d
oub
le
er
r_con
trol
err_s
o
t_syn
c_hs
err_s
o
t_hs
sle
ep
_
m
ode
_exit
sl
ee
p
_
m
o
de
_
en
tr
y
er
r_init_ti
m
eout
res
er
ved
_0
Bit
Range
Default &
Access
Description
31:17
0h
RW
unused_csi1_int_status:
Unused
16
0h
RW/1C
err_line_sync:
Set if line number for line start and line end packets do not match
15
0h
RW/1C
err_escape:
Set if an unrecognised escape entry command is received
14
0h
RW/1C
err_data_timeout:
Set if time taken to receive a packet exceeds programmed timeout
value
13
0h
RW/1C
err_frame_data:
Set if data packets within a frame has errors
12
0h
RW/1C
err_frame_sync:
Set if frame start is not paired with frame end for same virtual
channel
11
0h
RW/1C
err_id:
Set if packet header has a unrecognised data id
10
0h
RW/1C
err_crc:
Set if computed CRC differs from received value
9
0h
RW/1C
no_ecc_err:
Set if no ECC error detected in packet
8
0h
RW/1C
err_ecc_corr:
Set if ECC error detected and corrected for one bit
7
0h
RW/1C
err_ecc_double:
Set if ECC error detected for two or more bits
6
0h
RW/1C
err_control:
Set if DPHY flags a control error
5
0h
RW/1C
err_sot_sync_hs:
Set if DPHY flags start of transmission synchronisation error
4
0h
RW/1C
err_sot_hs:
Set if DPHY flags start of transmission error
3
0h
RW/1C
sleep_mode_exit:
Set if DPHY exits ultra low power state
2
0h
RW/1C
sleep_mode_entry:
Set if DPHY enters ultra low power state
1
0h
RW/1C
err_init_timeout:
Set if Initialization timeout error occurs on DPHY data lanes
0
0h
RO
reserved_0:
Always set to 0