Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
1556
Datasheet
15.8.650 reg_inp_sys_csi_receiver_csi_backend_comp_reg1_vc0_type 
(inp_sys_csi_receiver_csi_backend_comp_reg1_vc0)—Offset 
8014Ch
Compression scheme register 1 for virtual channel 0
Access Method
Default: 00000000h
17:15
0h
RW
comp_usd_type4: 
compression format for user defined type 4 data: value between 1 
to 6
14:13
0h
RW
pred_usd_type3: 
prediction algorithm for user defined type 3 data: 1 -) pred1, 2 -) 
pred2
12:10
0h
RW
comp_usd_type3: 
compression format for user defined type 3 data: value between 1 
to 6
9:8
0h
RW
pred_usd_type2: 
prediction algorithm for user defined type 2 data: 1 -) pred1, 2 -) 
pred2
7:5
0h
RW
comp_usd_type2: 
compression format for user defined type 2 data: value between 1 
to 6
4:3
0h
RW
pred_usd_type1: 
prediction algorithm for user defined type 1 data: 1 -) pred1, 2 -) 
pred2
2:0
0h
RW
comp_usd_type1: 
compression format for user defined type 1 data: value between 1 
to 6
Bit 
Range
Default & 
Access
Description
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
inp_sys_csi_receiver_csi_backend_comp_reg1_vc0: 
ISPMMADR Type: 
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference: 
[B:0, D:3, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
unus
ed
_csi_b
ack
end_c
omp_re
g1_vc0
pre
d
_usd_type
8
co
m
p
_usd
_typ
e8
pre
d
_usd_type
7
co
m
p
_usd
_typ
e7
Bit 
Range
Default & 
Access
Description
31:10
0h
RW
unused_csi_backend_comp_reg1_vc0: 
Unused