Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
1557
15.8.651 reg_inp_sys_csi_receiver_csi_backend_comp_pred_reg0_vc1_ty
pe
(inp_sys_csi_receiver_csi_backend_comp_pred_reg0_vc1)—
Offset 80150h
Compression and Prediction scheme register 0 for virtual channel 1
Access Method
Default: 00000000h
9:8
0h
RW
pred_usd_type8:
prediction algorithm for user defined type 8 data: 1 -) pred1, 2 -)
pred2
7:5
0h
RW
comp_usd_type8:
compression format for user defined type 8 data: value between 1
to 6
4:3
0h
RW
pred_usd_type7:
prediction algorithm for user defined type 7 data: 1 -) pred1, 2 -)
pred2
2:0
0h
RW
comp_usd_type7:
compression format for user defined type 7 data: value between 1
to 6
Bit
Range
Default &
Access
Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
inp_sys_csi_receiver_csi_backend_comp_pred_reg0_vc1:
ISPMMADR Type:
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference:
[B:0, D:3, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
unu
se
d_cs
i_back
end
_
comp_p
re
d_re
g0_vc1
pre
d
_usd_type
6
co
m
p
_usd
_typ
e6
pre
d
_usd_type
5
co
m
p
_usd
_typ
e5
pre
d
_usd_type
4
co
m
p
_usd
_typ
e4
pre
d
_usd_type
3
co
m
p
_usd
_typ
e3
pre
d
_usd_type
2
co
m
p
_usd
_typ
e2
pre
d
_usd_type
1
co
m
p
_usd
_typ
e1
Bit
Range
Default &
Access
Description
31:30
0h
RW
unused_csi_backend_comp_pred_reg0_vc1:
Unused
29:28
0h
RW
pred_usd_type6:
prediction algorithm for user defined type 6 data: 1 -) pred1, 2 -)
pred2
27:25
0h
RW
comp_usd_type6:
compression format for user defined type 6 data: value between 1
to 6