Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
1569
15.8.663 reg_inp_sys_csi_receiver_csi2_func_prg_type
(inp_sys_csi_receiver_csi2_func_prg)—Offset 8020Ch
Functional Programming
Access Method
Default: 0007FFFFh
16
0h
RW
err_line_sync:
Enable line sync error interrupt
15
0h
RW
err_escape:
Enable escape entry error interrupt
14
0h
RW
err_data_timeout:
Enable timeout error interrupt
13
0h
RW
err_frame_data:
Enable frame data error interrupt
12
0h
RW
err_frame_sync:
Enable frame sync error interrupt
11
0h
RW
err_id:
Enable data id error interrupt
10
0h
RW
err_crc:
Enable CRC error interrupt
9
0h
RW
no_ecc_err:
Enable no ECC error interrupt
8
0h
RW
err_ecc_corr:
Enable ECC error detected and corrected for one bit interrupt
7
0h
RW
err_ecc_double:
Enable ECC error detected for two or more bits interrupt
6
0h
RW
err_control:
Enable control error interrupt
5
0h
RW
err_sot_sync_hs:
Enable start of transmission synchronisation error interrupt
4
0h
RW
err_sot_hs:
Enable start of transmission error interrupt
3
0h
RW
sleep_mode_exit:
Enable sleep mode exit interrupt
2
0h
RW
sleep_mode_entry:
Enable sleep mode entry interrupt
1
0h
RW
err_init_timeout:
Enable Initialization timeout error interrupt
0
0h
RW
overrun:
Enable FIFO overrun interrupt: NOT available now, can be discarded
Bit
Range
Default &
Access
Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
inp_sys_csi_receiver_csi2_func_prg:
ISPMMADR Type:
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference:
[B:0, D:3, F:0] + 10h