Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
1691
15.8.833 reg_inp_sys_gpreg_isys_srst_type
(inp_sys_gpreg_isys_srst)—Offset 8A01Ch
Soft resets the modules of the input system. Writing a 1 to a field brings a module in
reset, writing a 0 brings that module out of reset
Access Method
Default: 00000000h
2
0h
RW
str_captC_irq_en:
Capture port C streaming output from CSI receiver
1
0h
RW
str_captB_irq_en:
Capture port B streaming output from CSI receiver
0
0h
RW
str_captA_irq_en:
Capture port A streaming output from CSI receiver
Bit
Range
Default &
Access
Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
inp_sys_gpreg_isys_srst:
ISPMMADR Type:
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference:
[B:0, D:3, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
unus
ed
_isys_s
rst
srs
t_csi_rc
v_be
_
out
sr
st_cfifo
_acq
srs
t_cfifo_c
ap_c
srs
t_cfifo_c
ap_b
sr
st_cfifo
_cap_a
sr
st
_
d
m
a
srs
t_wid
e_b
u
s
sr
st
_
g
en
sh
_
fi
fo
sr
st_cio
2ahb
srs
t_str_mux
sr
st_is
ys_top
_
ctrl
sr
st_is
ys_acq
_
ctrl
srst
_
isys_cap
tC_sub
_
ctrl
sr
st_isy
s_cap
tB_sub
_
ctrl
sr
st_isys
_
captA
_
sub
_
ctrl
srs
t_acq
sr
st
_
ca
p
t_
c
sr
st
_
ca
p
t_
b
srs
t_capt_a
sr
st_multi_c
ast_c
sr
st_multi_c
ast_b
srs
t_m
ul
ti_cast_a
sr
st_cap
t_fifo_c
srs
t_capt_fifo_b
sr
st_c
apt_fifo_a
Bit
Range
Default &
Access
Description
31:25
0h
RW
unused_isys_srst:
Unused
24
0h
RW
srst_csi_rcv_be_out:
Soft resets the output of the csi receiver backend
23
0h
RW
srst_cfifo_acq:
Soft resets the control and acknowledge FIFOs for the acquistion unit
22
0h
RW
srst_cfifo_cap_c:
Soft resets the control and acknowledge FIFOs for capture unit C
21
0h
RW
srst_cfifo_cap_b:
Soft resets the control and acknowledge FIFOs for capture unit B
20
0h
RW
srst_cfifo_cap_a:
Soft resets the control and acknowledge FIFOs for capture unit A
19
0h
RW
srst_dma:
Soft resets the DMA