Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
1883
Default: 00000000h
16.10.9
Response Register 4 (RESPONSE4)—Offset 18h
This register is used to store responses from SD cards.
Access Method
Default: 00000000h
16.10.10 Response Register 6 (RESPONSE6)—Offset 1Ch
This register is used to store responses from SD cards.
Access Method
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
Offset: 
BAR Type: 
PCI Configuration Register (Size: 32 bits)
BAR Reference: 
[B:0, D:23, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
cm
d_
re
sp
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:0
0h
RO
Command Response (cmd_resp): 
The Table 2-12 describes the mapping of 
command responses from the SD Bus to this register for each response type. In the 
table, R[] refers to a bit range within the response data as transmitted on the SD Bus, 
REP[] refers to a bit range within the Response register
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
Offset: 
BAR Type: 
PCI Configuration Register (Size: 32 bits)
BAR Reference: 
[B:0, D:23, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
cmd_re
sp
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:0
0h
RO
Command Response (cmd_resp): 
The Table 2-12 describes the mapping of 
command responses from the SD Bus to this register for each response type. In the 
table, R[] refers to a bit range within the response data as transmitted on the SD Bus, 
REP[] refers to a bit range within the Response register
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
Offset: 
BAR Type: 
PCI Configuration Register (Size: 32 bits)
BAR Reference: 
[B:0, D:23, F:0] + 10h