Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
1885
31
28
24
20
16
12
8
4
0
0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
re
se
rv
ed
2
da
t_s
ig
_
lv
l
cmd_ln_sig_lvl
data_ln
_
sig_lvl
w
r_pro
t_sw_pin_lvl
crd
_
de
t_pin_lvl
crd
_
st_stab
le
crd
_
ins
re
se
rv
ed
1
bu
f_r
d
_e
n
bu
f_w
r_e
n
rd_tx_ac
tiv
e
wr_tx_activ
e
re
se
rv
ed
dat_ln_ac
tiv
e
cm
d_in
h
ibit_d
at
cm
d
_
inhi
bit_cmd
Bit
Range
Default &
Access
Field Name (ID): Description
31:29
0h
RO
Reserved (reserved2):
Reserved.
28:25
1111b
RO
DAT Line Signal Level (dat_sig_lvl):
This status is used to check DAT line level to
recover from errors, and for debugging.
•
•
D28 - DAT[7]
•
D27 - DAT[6]
•
D26 - DAT[5]
•
D25 - DAT[4]
24
1b
RO
CMD Line Signal Level (cmd_ln_sig_lvl):
This status is used to check the CMD line
level to recover from errors, and for debugging.
23:20
Fh
RO
DAT[3:0] Line Signal Level (data_ln_sig_lvl):
This status is used to check the DAT
line level to recover from errors, and for debugging. This is especially useful in detecting
the busy signal level from DAT[0].
•
•
D23 = DAT[3]
•
D22 = DAT[2]
•
D21 = DAT[1]
•
D20 = DAT[0]
19
1b
RO
Write Protect Switch Pin Level (wr_prot_sw_pin_lvl):
The Write Protect Switch is
supported for memory and combo cards. This bit reflects the SDWP# pin.
•
•
1 = Write enabled (SDWP#=1)
•
0 = Write protected (SDWP#=0)
18
1b
RO
Card Detect Pin Level (crd_det_pin_lvl):
This bit reflects the inverse value of the
SDCD# pin. Debouncing is not performed on this bit. This bit may be valid when Card
State Stable is set to 1, but it is not guaranteed because of propagation delay. Use of
this bit is limited to testing since it must be debounced by software.
•
•
1 = Card present (SDCD#=0)
•
0 = No card present (SDCD#=1)
17
1b
RO
Card State Stable (crd_st_stable):
This bit is used for testing. If it is 0, the Card
Detect Pin Level is not stable. If this bit is set to 1, it means the Card Detect Pin Level is
stable. No Card state can be detected by this bit being set to 1 while Card Inserted is set
to 0. The Software Reset For All in the Software Reset register shall not affect this bit.
•
•
1 = No Card or Inserted
•
0 = Reset or Debouncing