Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
1913
• ST_TFR: Previous location set in the ADMA System Address register is the error
descriptor address
The Host Controller generates the ADMA Error Interrupt when it detects invalid
descriptor data (Valid=0) at the ST_FDS state. In this case, ADMA Error State indicates
that an error occurs at ST_FDS state. The Host Driver may find that the Valid bit is not
set in the error descriptor.
Access Method
Default: 00h
16.10.33 ADMA System Address Register (ADMA_SYS_ADDR)—Offset
58h
This register contains the physical Descriptor address used for ADMA data transfer.
Access Method
Default: 00000000h
Type:
Memory Mapped I/O Register
(Size: 8 bits)
Offset:
BAR Type:
PCI Configuration Register (Size: 32 bits)
BAR Reference:
[B:0, D:23, F:0] + 10h
7
4
0
0
0
0
0
0
0
0
0
rsvd
adma_len_mis_e
rr
adma_e
rr
_state
Bit
Range
Default &
Access
Field Name (ID): Description
7:3
0h
RO
Reserved (rsvd):
Reserved.
2
0b
RO
ADMA Length Mismatch Error (adma_len_mis_err):
This error occurs in the
following 2 cases.
•
•
While Block Count Enable being set, the total data length specified by the Descriptor
table is different from that specified by the Block Count and Block Length.
•
Total data length can not be divided by the block length.
•
1 = Error
•
0 = No Error
1:0
00b
RO
ADMA Error State (adma_err_state):
This field indicates the state of ADMA when
error is occurred during ADMA data transfer. This field never indicates '10' because
ADMA never stops in this state. Refer to the spec for tabular information about the
relationship between this field and SYS_SDR register.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
BAR Type:
PCI Configuration Register (Size: 32 bits)
BAR Reference:
[B:0, D:23, F:0] + 10h