Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
1918
Datasheet
16.10.39 Host Controller Version Register (HOST_CTRL_VER)—Offset FEh
Access Method
Default: B502h
7:0
00h
RO
Interrupt Signal For Each Slot (int_sig_slot):
These status bits indicate the logical
OR of Interrupt Signal and Wakeup Signal for each slot. A maximum of 8 slots can be
defined. If one interrupt signal is associated with multiple slots, the Host Driver can
know which interrupt is generated by reading these status bits. By a power on reset or
by setting Software Reset For All, the interrupt signal shall be de-asserted and this
status shall read 00h.
•
•
Bit 00 = Slot 1
•
Bit 01 = Slot 2
•
Bit 02 = Slot 3
•
..... . .....
•
Bit 07 = Slot 8
Bit
Range
Default &
Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 16 bits)
Offset:
BAR Type:
PCI Configuration Register (Size: 32 bits)
BAR Reference:
[B:0, D:23, F:0] + 10h
15
12
8
4
0
1
0
1
1
0
1
0
1
0
0
0
0
0
0
1
0
ve
nd_v
er_nu
m
sp
ec
_ver
_n
um
Bit
Range
Default &
Access
Field Name (ID): Description
15:8
b5h
RO
Vendor Version Number (vend_ver_num):
This status is reserved for the vendor
version number. The Host Driver should not use this status.
7:0
02h
RO
Specification Version Number (spec_ver_num):
This status indicates the Host
Controller Spec. Version. The upper and lower 4-bits indicate the version.
•
•
00h = SD Host Specification Version 1.00
•
01h = SD Host Specification Version 2.00, Including the feature of the ADMA and
Test Register
•
02h = SD Host Specification Version 3.00
•
others = Reserved