Intel E3815 FH8065301567411 Data Sheet

 

Intel

®

 Atom™ Processor E3800 Product Family

Datasheet

1933

When the programming interface is not IDE (i.e. CC.SCC is not 01h), this register is 

named ABAR. When the programming interface is IDE, this register becomes SIDPBA. 

Note that hardware does not clear those BA bits when switching from IDE SKU to non-

IDE SKU or vice versa. BIOS is responsible for clearing those bits to 0 since the number 

of writable bits changes after SKU switching (as indicated by a change in CC.SCC). In 

the case, this register will then have to be re-programmed to a proper value. When the 

programming interface is not IDE, the register represents a memory BAR allocating 

space for the AHCI memory registers. Note that bit[31:16] of this register must be 

programmed to a value greater than 0 to ensure the memory is mapped to an address 

of 1 MBytes and greater (i.e. ABAR must be 00010000h or greater). Otherwise, 

memory cycle targeting the ABAR range may not be accepted. When the programming 

interface is IDE, the register becomes an I/O BAR allocating 16 bytes of I/O space for 

the I/O mapped registers defined in Memory Registers. Note that although 16 bytes of 

locations are allocated, only 8 bytes are used as SINDX and SDATA registers; with the 

remaining 8 bytes preserved for future enhancement.

Default: 00000000h

15:4

0h

RW

Base address of the I/O space. Note for Base Address bit 4: When 

CC.SCC is 01h, this bit will be RW resulting in requesting 16B of I/O space. When 

CC.SCC is not 01h, this bit will be RO=0 resulting in requesting 32B of I/O space.

3:1

0b

RO

Reserved

0

1h

RO

Indicates a request for IO space.

PCI Configuration Register

(Size: 32 bits)

31

28

24

20

16

12

8

4

0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

BA

PF

TP

RT

E

31:4

0h

RW

When programming interface is non IDE, this is base address of 

register memory space (aligned to 2 KB). Bits 31:11 are RW, bits 10:4 are RO of 0; 

When programming interface is IDE, this is base address of the I/O space. Bits 31:16 

are RO of 0, bits 15:4 are RW

3

0h

RO

When programming interface is non IDE, this indicates that this 

range is not prefetch-able

2:1

0h

RO

When programming interface is non IDE, this indicates that this range can 

be mapped anywhere in 32-bit address space

0

0h

RO

When programming interface is non IDE, this 

indicates a request for register memory space; When programming interface is IDE, this 

indicates a request for IO space.