Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
1937
17.5.22
Secondary Timing (STIM)—Offset 42h
This controls the timings driven on the parallel cable.
Access Method
Default: 0000h
Type:
PCI Configuration Register
(Size: 16 bits)
STIM:
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DE
D1
S
T
E
IS
P
RSVD
0
RC
T
DT
E
1
PP
E
1
IE1
TIM1
DT
E
0
PP
E
0
IE0
TIM0
Bit
Range
Default &
Access
Description
15
0h
RW
Decode Enable (DE):
Enables the SATA Controller to decode the Command Blocks
(1F0-1F7h for primary, 170-177h for secondary or their native BAR equivalents) and
Control Block (3F6h for primary and 376h for secondary or their native BAR
equivalents). This bit still has functionality in SATA - if this bit is not set, the port that is
mapped to this range will not be decoded.
14
0h
RW
Device 1 Separate Timing Enable (D1STE):
This register is not used by SATA
controller.
13:12
0h
RW
IORDY Sample Point (ISP):
This register is not used by SATA controller.
11:10
0b
RO
RSVD0:
Reserved
9:8
0h
RW
Recovery Time (RCT):
This register is not used by SATA controller.
7
0h
RW
Device 1 DMA Timing Enable (DTE1):
This register is not used by SATA controller.
6
0h
RW
Device 1 Prefetch/Posting Enable (PPE1):
This register is not used by SATA
controller.
5
0h
RW
Device 1 IORDY Sample Point Enable (IE1):
This register is not used by SATA
controller.
4
0h
RW
Device 1 Fast Timing Bank (TIM1):
This register is not used by SATA controller.
3
0h
RW
Device 0 DMA Timing Enable (DTE0):
This register is not used by SATA controller.
2
0h
RW
Device 0 Prefetch/Posting Enable (PPE0):
This register is not used by SATA
controller.
1
0h
RW
Device 0 IORDY Sample Point Enable (IE0):
This register is not used by SATA
controller.
0
0h
RW
Device 0 Fast Timing Bank (TIM0):
This register is not used by SATA controller.