Intel E3815 FH8065301567411 Data Sheet

Intel

®

 Atom™ Processor E3800 Product Family

1960

Datasheet

All of these I/O registers are in the core well. They are exposed only when CC.SCC is 

01h (i.e. IDE programming interface). These are Index/Data Pair registers that are 

used to access the SerialATA superset registers (SerialATA Status, SerialATA Control 

and SerialATA Error). The I/O space for these registers is allocated through SIDPBA. 

Locations with offset from 08h to 0Fh are reserved for future expansion. Software write 

operations to the reserved locations shall have no effect while software read operations 

to the reserved locations shall return 0. Refer to Serial ATA Index/Data Pair Superset 

Registers for more details.

Default: 00000000h

I/O Register

(Size: 32 bits)

PCI Configuration Register (Size: 32 bits)

[B:0, D:19, F:0] + 24h

31

28

24

20

16

12

8

4

0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

DA

TA

31:0

00000000h

RW

This Data register is a window through which data is read or written to 

from the register pointed to by the Serial ATA Index (SINDX) register above. Note that a 

physical register is not actually implemented as the data is actually stored in the 

memory mapped registers. Since this is not a physical register, the default value is the 

same as the default value of the register pointed to by SINDX.RIDX field.