Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
1967
17.8.7
Vendor Specific (VSP)—Offset A0h
Access Method
Default: 00000048h
Bit
Range
Default &
Access
Description
31:6
0b
RO
RSVD0:
Reserved
5
1h
RW/O
DEVSLP Entrance from Slumber Only (DESO):
This field specifies that the HBA shall
only assert DEVSLP if the interface is in Slumber. When this bit is set to 1, the HBA shall
ignore software directed entrance to DEVSLP via PxCMD.ICC unless PxSSTS.IPM = 6h.
When this bit is cleared to 0, the HBA may enter DEVSLP from any link state (active,
Partial, or Slumber). BIOS is requested to program this field to 1.
4
1h
RW/O
Supports Aggressive DEVSLP Management (SADM):
When set to 1, the HBA
supports hardware assertion of the DEVSLP signal after the idle timeout expires. When
cleared to 0, this function is not supported and software shall treat the PxDEVSLP.ADSE
field as reserved. Note: If PHY IO PM Disable Fuse is 1, this register will read 0. Else this
register will read 1 with RWO attribute.
3
1h
RW/O
Supports DEVSLP (SDS):
When set to 1, the HBA supports the DEVSLP feature. When
cleared to 0, DEVSLP is not supported. Note: If PHY IO PM Disable Fuse is 1, this
register will read 0. Else this register will read 1 with RWO attribute.
2
1h
RW/O
Automatic Partial to Slumber Transitions (APST):
When set to 1, the HBA supports
Automatic Partial to Slumber Transitions. When cleared to 0, Automatic Partial to
Slumber Transition is not supported. Note: If SATA PHY PM Disable Fuse is 1, this
register will read only 0. Else this register will read 1 with RWO attribute.
1
0b
RO
RSVD1:
Reserved
0
0h
RO
BIOS/OS Handoff (BOH):
Not supported.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
ABAR Type:
PCI Configuration Register (Size: 32 bits)
ABAR Reference:
[B:0, D:19, F:0] + 24h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0
RSV
D
0
SF
M
S
PF
S
PT
SRP
IR
RSV
D
1
Bit
Range
Default &
Access
Description
31:7
0b
RO
RSVD0:
Reserved
6
1h
RO
Software Feature Mask Supported (SFMS):
Set to 1 if the platform is enabled for
premium storage features mask (SFM) as described in VS MMIO space at offset
ABAR[RPID.(OFST*4)+4].
5
0h
RO
Premium Features Supported (PFS):
Set to 1 if the platform is enabled for premium
storage features (PFB) as described in VS MMIO space at offset ABAR[RPID.OFST*4].
Set to 0 if the platform is not enabled for premium storage features.
4
0h
RO
Platform Type (PT):
Set to 1 if mobile platform. Clear (0) if desktop.