Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2044
Datasheet
17.17.23 PCS_DWORD22 (pcs_dword22)—Offset 58h
Access Method
Default: 00000000h
Bit
Range
Default &
Access
Description
31:24
80h
RW
rxvgarcscale_7_0:
Rx VGA Rcomp Scale Multiplier The LRC code is multiplied by this
value before applying the offset to generate the final rxvgarccode. 0xFF:
Scale=1.99219 0xC0: Scale=1.5 0x80: Scale=1.0 0x40: Scale=0.5 0x00: Scale=0
23:16
80h
RW
rxtermrcscale_7_0:
Rx Termination Rcomp Scale Multiplier The LRC code is multiplied
by this value before applying the offset to generate the final rxtermrccode. 0xFF:
Scale=1.99219 0xC0: Scale=1.5 0x80: Scale=1.0 0x40: Scale=0.5 0x00: Scale=0
15:8
80h
RW
txrcscale_7_0:
Tx Rcomp Scale Multiplier The LRC code is multiplied by this value
before applying the offset to generate the final txrccode. 0xFF: Scale=1.99219 0xC0:
Scale=1.5 0x80: Scale=1.0 0x40: Scale=0.5 0x00: Scale=0
7:0
80h
RW
irefrcscale_7_0:
Iref Rcomp Scale Multiplier The LRC code is multiplied by this value
before applying the offset to generate the final irefrccode. 0xFF: Scale=1.99219 0xC0:
Scale=1.5 0x80: Scale=1.0 0x40: Scale=0.5 0x00: Scale=0
Type:
Message Bus Register
(Size: 32 bits)
pcs_dword22:
Op Codes:
0h - Read, 1h - Write
0h - Read, 1h - Write
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
rxvgar
coffs
et
_7_0
rxterm
rc
offs
et
_7_0
txr
coffs
et
_7_0
ire
fr
coffs
et
_7_0
Bit
Range
Default &
Access
Description
31:24
0h
RW
rxvgarcoffset_7_0:
Rx VGA Rcomp Offset Same description as IREF Rcomp Offset,
but applies to RxVGA Rcomp.
23:16
0h
RW
rxtermrcoffset_7_0:
Rx Termination Rcomp Offset Same description as IREF Rcomp
Offset, but applies to RxTerm Rcomp.
15:8
0h
RW
txrcoffset_7_0:
Tx Rcomp Offset Same description as IREF Rcomp Offset, but applies
to Tx Rcomp.
7:0
0h
RW
irefrcoffset_7_0:
Iref Rcomp Offset This value is added to the scaled LRC code to
determine the final calibration code used by the Iref block. 2's complement format. The
full 8-bit offset is used with the scale multiplier to determine the final 8-bit value, but
the Iref target only uses the upper MSBs of the final value. 0x00: Offset = 0 0x01:
Offset = +1 0x7F: Offset = +127 0xFF: Offset = -1 0x80: Offset = -128 Note: The final
rcomp code has rollover protection so the final rcomp code + offset will not exceed the
min/max range.