Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
210
Datasheet
10.3
Ball Name and Function by Location
Many I/O’s are configurable GPIO’s. These I/O’s are multiplexed with other signals in the ball list. This table matches names and locations of every
ball with all possible multiplexed signals (denoted as GPIO Functions). Configurable GPIO’s default to function 0 during power on and may not match
the ball name. BIOS (platform firmware) is responsible for enabling the platform specific configuration. Please see your BIOS vendor for details.
ball with all possible multiplexed signals (denoted as GPIO Functions). Configurable GPIO’s default to function 0 during power on and may not match
the ball name. BIOS (platform firmware) is responsible for enabling the platform specific configuration. Please see your BIOS vendor for details.
Note:
The X & Y locations in Table 146 are measured in microns from the center of the package.
Table 148. Ball Listing by Location with GPIO Muxed Functions (Sheet 1 of 48)
Location
Ball Name
X-Location Y-Location
GPIO F0
GPIO F1
GPIO F2
GPIO F3
GPIO F6
A3
VSS
11951.46
-11814.05
-
-
-
-
-
A5
VSS
11170.41
-11814.05
-
-
-
-
-
A6
VSS
10446.51
-11814.05
-
-
-
-
-
A7
USB_HSIC_RCOMP
9748.01
-11814.05
-
-
-
-
-
A9
ILB_RTC_X2
8835.9
-11814.05
-
-
-
-
-
A11
VSS
7774.43
-11814.05
-
-
-
-
-
A13
GPIO_S5[09]
6802.63
-11814.05
GPIO_S5[09]
RESERVED
RESERVED
RESERVED
RESERVED
A15
VSS
5830.82
-11814.05
-
-
-
-
-
A17
GPIO_S5[03]
4859.02
-11814.05
GPIO_S5[03]
RESERVED
RESERVED
RESERVED
PMC_WAKE_PCIE[3]#
A19
VSS
3887.22
-11814.05
-
-
-
-
-
A21
PCU_SPI_MOSI
2915.41
-11814.05
PCU_SPI_MOSI
-
-
-
-
A23
VSS
1943.61
-11814.05
-
-
-
-
-
A25
SVID_DATA
971.8
-11814.05
SVID_DATA
-
-
-
-
A27
VSS
0
-11814.05
-
-
-
-
-
A29
RESERVED
-971.8
-11814.05
RESERVED
RESERVED
-
-
-
A31
VSS
-1943.61
-11814.05
-
-
-
-
-
A33
DRAM0_DQ[13]
-2915.41
-11814.05
-
-
-
-
-
A35
VSS
-3887.22
-11814.05
-
-
-
-
-