Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2127
18.6.11
Memory Base Address (MBAR)—Offset 10h
Value in this register will be different after the enumeration process.
Access Method
Default: 0000000000000004h
7
4
0
0
0
0
0
0
0
0
0
MF
B
CL
Bit
Range
Default &
Access
Field Name (ID): Description
7
0b
RO
Multi-Function Bit (MFB):
Read only indicating single function device.
Power Well:
Core
6:0
00h
RO
Configuration layout (CL):
Hardwired to 0 to indicate a standard PCI configuration
layout.
Power Well:
Core
Type:
PCI Configuration Register
(Size: 64 bits)
Offset:
6
3
6
0
5
6
5
2
4
8
4
4
4
0
3
6
3
2
2
8
2
4
2
0
1
6
1
2
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
BA
R
SVD
Pr
ef
et
chabl
e
Ty
p
e
RT
E
Bit
Range
Default &
Access
Field Name (ID): Description
63:16
000000000
000h
RW
Base Address (BA):
Bits (63:16) correspond to memory address signals (63:16),
respectively. This gives 64 KB of relocatable memory space aligned to 64 KB boundaries.
Power Well:
Core
15:4
000h
RO
Reserved (RSVD):
Reserved. Read-Only 0, this indicates that this function is
requesting an 64KB block of memory.
Power Well:
Core
3
0b
RO
Prefetchable:
This bit is hardwired to 0 indicating that this range should not be
prefetched.
Power Well:
Core
2:1
10b
RO
Type:
If this field is hardwired to 00 it indicates that this range can be mapped
anywhere within 32-bit address space. If this field is hardwired to 10 it indicates that
this range can be mapped anywhere within 64-bit address space.
Power Well:
Core