Intel E3815 FH8065301567411 Data Sheet

Intel

®

 Atom™ Processor E3800 Product Family

2148

Datasheet

13

0b

RW

This bit 

controls whether LPT-LPT xHC will allow modPHY power gating or not when a port is in 

states other than U2. Note that this single bit controls all ports of xHC. 0b xHC shall not 

initiate Power Gate Request If xHC had initiated Power Gate Request before this bit is 

programmed to 0, xHC shall initiate the handshake to wake modPHY from power gated 

state. 1b xHC is enabled to initiate Power Gate Request if power gating conditions are 

met.

Core

12

0h

RW

This register controls the ss 

async active exposusre to PMC via the xHC active indication 0 SS Async Active is not 

propogated to PMC 1 SS Async Active is propogated to PMC

Core

11:8

0h

RO

Reserved

Core

7

1b

RW

0: Allow blocking of USB3 Super-

speed port from starting Polling.LFPS. 1: Disallow blocking of USB3 Super-speed port 

from starting Polling.LFPS (A stepping behavior). NOTE: When this bit is cleared, 

Polling.LFPS blocking is controlled by SSPPEN bit.

SUS

6

0h

RW

ECO bits are used during silicon bringup for FIBing.

SUS

5

0h

RW

When set, this regiter bit 

disables receiver detect staggering between all 6 USB3 lanes Note that the bit is ONLY 

meant for SW to disable the staggering if desired. Once it is set to disabled, SW is not 

allowed to re-enable the staggering by clearing the bit.

SUS

4:3

1h

RW

Timeout value for 

Gotorxelecidle Polling Timer: 00: 1 to 2 us (Simulation speed up mode only). 01: 19 to 

20 us (Default). 10: 23 to 24 us. 11: 199 to 200 us. This register needs to be 

programmed when G2RXPOLLTMREN = 0.

SUS

2

1b

RW

If enabled (1), Gasket starts a 

timer after transmitting high speed data AND not receiving LFPS, and will only de-assert 

GoToRxElecIdle after timer expires during Polling. If disabled (0), Gasket will assert / 

de-assert GoToRxElecIdle purely based on Gotorxelecidle assertion upon RxElecIdle de-

assertion (LFPS detected) enable bit (G2RXERXEE) and Gotorxelecidle assertion when 

not transmitting high speed data enable bit (G2RXETXHSDE)

SUS

1

1b

RW

When 

enabled (set to '1'), allow Gasket to assert GoToRxElecIdle to UAFE to turn off its 

receiver upon the de-assertion of GoToRxElecIdle (LFPS detected). This bit needs to be 

programmed when the USB3 port is not enabled.

SUS