Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
2172
Datasheet
18.7.4
Structural Parameters 2 (HCSPARAMS2)—Offset 8h
This register defines additional xHC structural parameters. This register is modified and 
maintained by BIOS.
Access Method
Default: 84000054h
18:8
008h
RW/L
Number of Interrupters (MaxIntrs): 
This field specifies the number of Interrupters 
implemented on this host controller. Each Interrupter is allocated to a vector of MSI-X, 
and controls its generation and moderation.  
The value of this field determines how many Interrupter Register Sets are addressable 
in the Runtime Register Space (refer to the xHCI for USB specification). Valid values are 
in the range of 1h to 400h. A '0' in this field is undefined.
Power Well: 
Core
7:0
20h
RW/L
Number of Device Slots (MaxSlots): 
This field specifies the maximum number of 
Device Context Structures and Doorbell Array entries this host controller can support. 
Valid values are in the range of 1h to 400h. A '0' in this field is undefined.
Power Well: 
Core
Bit 
Range
Default & 
Access
Field Name (ID): Description
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
Offset: 
MBAR Type: 
PCI Configuration Register (Size: 64 bits)
MBAR Reference: 
[B:0, D:20, F:0] + 10h
31
28
24
20
16
12
8
4
0
1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0
MaxScr
atchp
adBu
fs
SP
R
Rs
vd1
ER
S
T
M
ax
IST
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:27
10h
RW/L
Max Scratchpad Buffers (MaxScratchpadBufs): 
Valid values are 0-31. This field 
indicates the number of Scratchpad Buffers system software shall reserve for the xHC. 
Refer to xHCI for USB specification for more information.
Power Well: 
Core
26
1b
RW/L
Scratchpad Restore (SPR): 
If Max Scratchpad Buffers is greater than '0' then this flag 
indicates whether the xHC uses the Scratchpad Buffers for saving state when executing 
Save and Restore State operations. If Max Scratchpad Buffers is = '0', then this flag 
shall be '0'. Refer to the xHCI for USB specification for more information.  
A value of '1' indicates that the xHC requires the integrity of the Scratchpad Buffer 
space to be maintained across power events.  
A value of '0' indicates that the Scratchpad Buffer space may be freed and reallocated 
between power events.
Power Well: 
Core