Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2187
18.7.18
Port 1 Status and Control USB3 (PORTSC1USB2)—Offset 480h
Access Method
Default: 000002A0h
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
MBAR Type:
PCI Configuration Register (Size: 64 bits)
MBAR Reference:
[B:0, D:20, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0
WPR
DR
Rsv
d
2
WO
E
WD
E
WCE
CAS
CE
C
PL
C
PRC
OC
C
WRC
PE
C
CS
C
LW
S
PIC
Po
rt
_
S
p
ee
d
PP
PL
S
PR
OC
A
Rsv
d
1
PE
D
CCS
Bit
Range
Default &
Access
Field Name (ID): Description
31
0b
RW/S
Warm Port Reset (WPR):
Reserved.
Power Well:
SUS
30
0b
RO
Device Removable (DR):
Reserved.
Power Well:
Core
29:28
0h
RO
Rsvd2:
Reserved.
Power Well:
Core
27
0b
RW
Wake on Over-current Enable (WOE):
Note: This register is sticky.
Power Well:
SUS
26
0b
RW
Wake on Disconnect Enable (WDE):
Note: This register is sticky.
Power Well:
SUS
25
0b
RW
Wake on Connect Enable (WCE):
Note: This register is sticky.
Power Well:
SUS
24
0b
RO
Cold Attach Status (CAS):
Reserved.
Power Well:
SUS
23
0b
RW/C
Port Config Error Change (CEC):
Note: This register is sticky.
Power Well:
SUS
22
0b
RW/C
Port Link State Change (PLC):
Note: This register is sticky.
Power Well:
SUS
21
0b
RW/C
Port Reset Change (PRC):
Note: This register is sticky.
Power Well:
SUS
20
0b
RW/C
Over-current Change (OCC):
Note: This register is sticky.
Power Well:
SUS