Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2189
Default: 00000000h
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
MBAR Type:
PCI Configuration Register (Size: 64 bits)
MBAR Reference:
[B:0, D:20, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PT
C
Rs
vd1
HL
E
L1DS
HIRD
RWE
L1S
Bit
Range
Default &
Access
Field Name (ID): Description
31:28
0h
RW
Port Test Control (PTC):
Note: This register is sticky.
Power Well:
SUS
27:17
000h
RO
Rsvd1:
Reserved.
Power Well:
Core
16
0b
RO
Hardware LPM Enable (HLE):
Reserved.
Power Well:
SUS
15:8
00h
RW
L1 Device Slot (L1DS):
Note: This register is sticky. System software sets this field to
indicate the ID of the Device Slot associated with the device directly attached to the
Root Hub port. A value of 0 indicates no device is present. The xHC uses this field to
lookup information necessary to generate the LPM Token packet.
Power Well:
SUS
7:4
0h
RW
Best Effort Service Latency (HIRD):
Note: This register is sticky.
System software sets this field to indicate to the recipient device how long the xHC will
drive resume if it (the xHC) initiates an exit from L1. For more information about BESL
value encoding, refer to the xHCI for USB specification.
Note that the BESL field is used by both software and hardware controlled LPM. Refer to
the xHCI for USB specification for more information on BESL use and how DBESL may
be used to establish an initial value for BESL.
Power Well:
SUS
3
0b
RW
Remote Wake Enable (RWE):
Note: This register is sticky. System software sets this
flag to enable or disable the device for remote wake from L1. The value of this flag shall
temporarily (while in L1) override the current setting of the Remote Wake feature set by
the standard Set/ClearFeature() commands defined in Universal Serial Bus
Specification, revision 2.0, Chapter 9.
Power Well:
SUS