Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2324
Datasheet
18.7.185 USB EP Type Lock Policy (USB_EP_TLP)—Offset 8344h
Access Method
Default: 00000000h
12:0
0000h
RW
Low Idle Wake Latency (LIWL):
This is the latency to access memory from the
Medium Idle Latency state.
•
•
12:7 - Time value in # of 125 Microsecond Bus Intervals (0 - 8ms)
•
6:0 - Fractional BI Time value in Microseconds ( 0 - 124 Microseconds)
Power Well:
Core
Bit
Range
Default &
Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
MBAR Type:
PCI Configuration Register (Size: 64 bits)
MBAR Reference:
[B:0, D:20, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RS
VD
PO
L3
_I
N
T
_I
N
POL3_BULK
_
IN
P
O
L3_ISOCH_
IN
POL3_CTRL
POL3_INT_OUT
POL3_BULK_OUT
POL3_ISOCH_OUT
RSVD_1
PO
L2
_I
N
T
_I
N
POL2_BULK
_
IN
P
O
L2_ISOCH_
IN
POL2_CTRL
POL2_INT_OUT
POL2_BULK_OUT
POL2_ISOCH_OUT
RSVD_2
PO
L1
_I
N
T
_I
N
POL1_BULK
_
IN
P
O
L1_ISOCH_
IN
POL1_CTRL
POL1_INT_OUT
POL1_BULK_OUT
POL1_ISOCH_OUT
USB_EP
_TL
P
M_EN
Bit
Range
Default &
Access
Field Name (ID): Description
31:24
00h
RO
Reserved (RSVD):
Reserved.
Power Well:
Core
23
0b
RW/L
Policy 3 Interrupt IN EP Type (POL3_INT_IN):
•
•
1 - EP Type = 7 is allowed by Policy 3
•
0 - EP Type = 7 is not allowed by Policy 3
Power Well:
Core
22
0b
RW/L
Policy 3 Bulk IN EP Type (POL3_BULK_IN):
•
•
1 - EP Type = 6 is allowed by Policy 3
•
0 - EP Type = 6 is not allowed by Policy 3
Power Well:
Core
21
0b
RW/L
Policy 3 Isochronous IN EP Type (POL3_ISOCH_IN):
•
•
1 - EP Type = 5 is allowed by Policy 3
•
0 - EP Type = 5 is not allowed by Policy 3
Power Well:
Core
20
0b
RW/L
Policy 3 Control EP Type (POL3_CTRL):
•
•
1 - EP Type = 4 is allowed by Policy 3
•
0 - EP Type = 4 is not allowed by Policy 3
Power Well:
Core