Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2329
18.7.187 USB EP Type Lock Policy - Port Control 2 (USB_EP_TLP2)—
Offset 834Ch
Access Method
Default: 00000000h
7:6
0h
RW/L
Enable USB Lock Policy match on root port number 4 (EN_USB_LPM_RP4):
•
•
00 = policy is not enabled for root port number 4
•
01 = policy 1 is enabled for root port number 4
•
10 = policy 2 is enabled for root port number 4
•
11 = policy 3 is enabled for root port number 4
Power Well:
Core
5:4
0h
RW/L
Enable USB Lock Policy match on root port number 3 (EN_USB_LPM_RP3):
•
•
00 = policy is not enabled for root port number 3
•
= policy 1 is enabled for root port number 3
•
10 = policy 2 is enabled for root port number 3
•
11 = policy 3 is enabled for root port number 3
Power Well:
Core
3:2
0h
RW/L
Enable USB Lock Policy match on root port number 2 (EN_USB_LPM_RP2):
•
•
00 = policy is not enabled for root port number 2
•
01 = policy 1 is enabled for root port number 2
•
10 = policy 2 is enabled for root port number 2
•
11 = policy 3 is enabled for root port number 2
Power Well:
Core
1:0
0h
RW/L
Enable USB Lock Policy match on root port number 1 (EN_USB_LPM_RP1):
•
•
00 = policy is not enabled for root port number 1
•
01 = policy 1 is enabled for root port number 1
•
10 = policy 2 is enabled for root port number 1
•
11 = policy 3 is enabled for root port number 1
Power Well:
Core
Bit
Range
Default &
Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
MBAR Type:
PCI Configuration Register (Size: 64 bits)
MBAR Reference:
[B:0, D:20, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RSV
D
E
N
_
U
SB_LP
M
_RP20
E
N
_
U
SB_LP
M
_RP19
E
N
_
U
SB_LP
M
_RP18
E
N
_
U
SB_LP
M
_RP17