Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2374
Datasheet
18.9.4
USB2 Command Register (USB2CMD)—Offset 20h
Access Method
Default: 00080000h
1
0b
RO
Programmable Frame List Flag (PFLF_0): If this bit is set to a zero, then
system software must use a frame list length of 1024 elements with this host
controller. The USBCMD register Frame List Size field is a read-only register
and must be set to zero. If set to a one, then system software can specify
and use a smaller frame list and configure the host controller via the
USBCMD register Frame List Size field. The frame list must always be aligned
on a 4K page boundary. This requirement ensures that the frame list is
always physically contiguous. The Intel EHC does not support different frame
list lengths. This bit is read-only '0'.
system software must use a frame list length of 1024 elements with this host
controller. The USBCMD register Frame List Size field is a read-only register
and must be set to zero. If set to a one, then system software can specify
and use a smaller frame list and configure the host controller via the
USBCMD register Frame List Size field. The frame list must always be aligned
on a 4K page boundary. This requirement ensures that the frame list is
always physically contiguous. The Intel EHC does not support different frame
list lengths. This bit is read-only '0'.
Power Well: Core
0
1b
RO
64-bit Addressing Capability (AC64_0): This field documents the
addressing range capability of this implementation. The value of this field
determines whether software should use the 32-bit or 64-bit data structures.
Values for this field have the following interpretation:0b data structures
using 32-bit address memory pointers; 1b data structures using 64-bit
address memory pointers The USB2 SIP supports 64-bit addressing only.
This bit is read-only '1'.
addressing range capability of this implementation. The value of this field
determines whether software should use the 32-bit or 64-bit data structures.
Values for this field have the following interpretation:0b data structures
using 32-bit address memory pointers; 1b data structures using 64-bit
address memory pointers The USB2 SIP supports 64-bit addressing only.
This bit is read-only '1'.
Power Well: Resume
Bit
Range
Default
& Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
MBAR Type:
PCI Configuration Register (Size: 32 bits)
MBAR Reference:
[B:0, D:29, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RSV
D
IT
C_0
RSV
D
RSV
D
RSV
D
UA
PM
B
_
0
LHCR_0
IAAD_0
AS
E
_
0
PS
E_0
FL
S_
0
HCRESE
T_0
RS_0
Bit
Range
Default
& Access
Field Name (ID): Description
31:24
00h
RO
Reserved (RSVD): Reserved.