Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
USB Device Controller Interfaces (3.0, ULPI)
Intel
®
Atom™ Processor E3800 Product Family
2444
Datasheet
Table 215. USB 3.0 Device Signals
Signal Name
Direction
Plat. Power
Description
USB3DEV_RXP/N[0]
I
V1P0S
Data In:
High speed serialized data inputs
High speed serialized data inputs
USB3DEV_TXP/N[0]
O
V1P0S
Data Out:
High speed serialized data outputs.
High speed serialized data outputs.
USB3DEV_REXT[0]
Resistor Compensation:
An external resistor must be connected between this
pin and package ground. Contact your Intel
representative for details.
An external resistor must be connected between this
pin and package ground. Contact your Intel
representative for details.
Table 216. USB ULPI Device Signals
Signal Name
Direction
Plat. Power
Description
USB_ULPI_CLK
I
V1P8A
Interface Clock
By default, control and data signals are synchronous
to clock.
By default, control and data signals are synchronous
to clock.
USB_ULPI_DATA[7:0]
I/O
V1P8A
Bi-directional data bus
Driven low by the Link during idle. The Link starts a
transfer by sending a non-zero pattern. The PHY
must assert USB_ULPI_DIR before using the data
bus. A turnaround cycle is required every time that
USB_ULPI_DIR toggles.
Driven low by the Link during idle. The Link starts a
transfer by sending a non-zero pattern. The PHY
must assert USB_ULPI_DIR before using the data
bus. A turnaround cycle is required every time that
USB_ULPI_DIR toggles.
USB_ULPI_DIR
I
V1P8A
Direction of the data bus
By default, USB_ULPI_DIR is low and the PHY listens
for non-zero data from the Link. The PHY asserts
USB_ULPI_DIR to get control of the data bus.
By default, USB_ULPI_DIR is low and the PHY listens
for non-zero data from the Link. The PHY asserts
USB_ULPI_DIR to get control of the data bus.
USB_ULPI_NXT
I
V1P8A
Next Data
The PHY drives USB_ULPI_NXT high to throttle the
data bus
The PHY drives USB_ULPI_NXT high to throttle the
data bus
USB_ULPI_STP
O
V1P8A
Stop data
The Link drives USB_ULPI_STP high to signal the end
of its data stream. The Link can also drive
USB_ULPI_STP high to request data bus access from
the PHY
The Link drives USB_ULPI_STP high to signal the end
of its data stream. The Link can also drive
USB_ULPI_STP high to request data bus access from
the PHY
USB_ULPI_REFCLK
O
V1P8A
Reference clock
ULPI reference clock for external PHY
ULPI reference clock for external PHY
USB_ULPI_RST#
O
V1P8A
Reset
Used to reset the external PHY. Not part of ULPI
specification. Optionally used by driver.
Used to reset the external PHY. Not part of ULPI
specification. Optionally used by driver.