Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
2459
19.5.5
reg_GEN_INPUT_REG_type (GEN_INPUT_REGRW)—Offset C0h
General Purpose Input Register
Access Method
Default: 00000000h
Bit 
Range
Default & 
Access
Description
31:0
00000000h
RW
GEN_REG_RW4: 
Reserved.
Type: 
PCI Configuration Register
(Size: 32 bits)
GEN_INPUT_REGRW: 
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
pmgt_g
ate_b
u
s_cl
k
b0dbg_r
am_clk_gat
ed
phy
_
u
3
ds
p
or
t_v
b
u
s_
ct
rl
phy
_
u
2
ds
p
or
t_v
b
u
s_
ct
rl
host_c
u
rr
en
t_be
lt
re
se
rv
ed
hos
t_syste
m
_
err
gs
ts_bu
se
rr
ad
d
vld
res
er
ved
1
cur
re
n
t_po
we
r_stat
e_u3p
m
u
cur
re
n
t_po
we
r_stat
e_u2p
m
u
co
nnect_stat
e_u3pm
u
co
nnect_stat
e_u2pm
u
utmi_l1_sus
pend_co
m
_n
utmi_sus
pe
nd_co
m
_n
utmi_sus
pe
nd_n
usb
2
_
enu
ms
pe
ed
b2rl_cur
_m
od
e
Bit 
Range
Default & 
Access
Description
31
0b
RO
pmgt_gate_bus_clk: 
Indicates that the conditions are appropriate for some internal 
modules to receive a gated bus_clk. This signal is used by the test environment to verify 
low power operation.
30
0b
RO
b0dbg_ram_clk_gated: 
Indicates that the internal ram_clk is being gated. It indicates 
whether ram_clk_gated is turned on or off. This signal is used by the test environment 
to verify low power
29
0b
RO
phy_u3dsport_vbus_ctrl: 
When the PMU is in the D0 state, this PHY-side output is 
fed directly from the core without any intervening logic. The core-side input is called 
core_u3dsport_vbus_ctrl
28
0b
RO
phy_u2dsport_vbus_ctrl: 
When the PMU is in the D0 state, this PHY-side output is 
fed directly from the core without any intervening logic. The core-side input is called 
core_u2dsport_vbus_ctrl
27:16
000h
RO
host_current_belt: 
Current BELT Value. This signal indicates the minimum value of all 
received BELT values and the BELT that is set by the Set LTV command. This signal is 
valid only in Host mode.
15
0b
RO
reserved: 
Reserved.
14
0b
RO
host_system_err: 
Host System Error. Indicates that a Host System Error has occurred 
as reflected in the USBSTS.HSE field.
13
0b
RO
gsts_buserraddvld: 
Bus error
12
0b
RO
reserved1: 
Reserved.