Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2534
Datasheet
19.6.80
GHWPARAMS7—Offset C15Ch
Global Hardware Parameters Register 7
Access Method
31
28
24
20
16
12
8
4
0
0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 1 0 0 0 0 1 0 0 0 0 0
DW
C
_
US
B3
_
R
AM
0
_
DE
PT
H
D
W
C_
US
B3_
E
N_BU
S
_
FIL
T
ERS
D
W
C_U
S
B3_EN_BC
OTG
_
S
S
_
S
u
p
p
o
rt
AD
PS
upp
o
rt
HNP
S
u
p
po
rt
SR
P
S
u
p
po
rt
ghwpar
ams6_9_8
DW
C_
USB
3
_
E
N
_
FP
GA
G
H
W
PARA
M
S
6_RSVD
D
W
C_USB3_PSQ_FIFO_D
E
PTH
Bit
Range
Default &
Access
Description
31:16
0c00h
RO
DWC_USB3_RAM0_DEPTH:
15
1h
RO
DWC_USB3_EN_BUS_FILTERS:
14
0h
RO
DWC_USB3_EN_BC:
13
1h
RO
OTG_SS_Support:
Reg field CORECONSULTANT
12
0h
RO
ADPSupport:
DWC_USB3_EN_ADP:
11
1h
RO
HNPSupport:
RSP/HNP Support Enabled: The application uses this bit to determine the
DWC_usb3 core's RSP/HNP support. If DWC_USB3_EN_OTG=2, n 1'b0: RSP and HNP
support is not enabled. The only exception for this rule is for SSPC-OTG devices where
RSP support is not enabled, but HNP support is enabled. (Refer OCFG.SSPC-OTG bit) n
1'b1: RSP and HNP support is enabled If DWC_USB3_EN_OTG=1, n 1'b0: HNP support
is not enabled n 1'b1: HNP support is enabled This bit is enabled only if HNP mode was
specified for HNP Mode of Operation in coreConsultant (parameter DWC_USB3_EN_OTG
is not 0, and DWC_USB3_MODE is DRD). Other wise, it reads 0.
10
1h
RO
SRPSupport:
SRP Support Enabled: The application uses this bit to determine the
DWC_usb3 core's SRP support. n1'b0: SRP support is not enabled n 1'b1: SRP support is
enabled This bit is 1'b1 when the parameter DWC_USB3_EN_OTG is not 0.
9:8
0h
RO
ghwparams6_9_8:
Reg field CORECONSULTANT
7
0h
RO
DWC_USB3_EN_FPGA:
6
0h
RO
GHWPARAMS6_RSVD:
5:0
20h
RO
DWC_USB3_PSQ_FIFO_DEPTH: