Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
2541
19.6.88
GUSB2I2CCTL—Offset C240h
Access Method
Default: 00000000h
Bit 
Range
Default & 
Access
Description
31
0h
RW
PHYSOFTRST: 
Reg field PHYSOFTRST
30:19
0h
RO
GUSB2PHYCFG_RSVD3: 
 
18
0h
RW
ULPIEXTVBUSINDIACTOR: 
Reg field ULPIEXTVBUSINDIACTOR
17
0h
RW
ULPIEXTVBUSDRV: 
Reg field ULPIEXTVBUSDRV
16
0h
RW
ULPICLKSUSM: 
Reg field ULPICLKSUSM
15
1h
RW
ULPIAUTORES: 
flag Value After Reset: 0x0 Reg field ULPIAUTORES
14
0h
RO
GUSB2PHYCFG_RSVD2: 
 
13:10
9h
RW
USBTRDTIM: 
Reg field USBTRDTIM
9
0h
RO
GUSB2PHYCFG_RSVD1: 
 
8
0h
RW
ENBLSLPM: 
Reg field ENBLSLPM
7
0h
WO
PHYSEL: 
Reg field PHYSEL
6
0h
RW
SUSPENDUSB20: 
SUSPENDUSB20
5
0h
RO
FSINTF: 
Reg field FSINTF
4
1h
RO
ULPI_UTMI_Sel: 
flag Value After Reset: 0x0 ULPI or UTMI+ Select: The application 
uses this bit to select a UTMI+ or ULPI Interface. n 1'b0: UTMI+ Interface n 1'b1: ULPI 
Interface This bit is writable only if UTMI+ and ULPI is specified for High-Speed PHY 
Interface(s) in coreConsultant configuration (DWC_USB3_HSPHY_INTERFACE = 3). 
Otherwise, this bit is Read Only and the value depends on the interface selected through 
DWC_USB3_HSPHY_INTERFACE.
3
0h
RW
PHYIF: 
Reg field PHYIF
2:0
0h
RW
TOUTCALIB: 
 
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
GUSB2I2CCTL: 
BAR Type: 
PCI Configuration Register (Size: 32 bits)
BAR Reference: 
[B:0, D:22, F:0] + 10h