Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2632
Datasheet
19.6.251 OCTL—Offset CC04h
OTG Control Register
Access Method
Default: 00000040h
2
0h
RW
OTG_Version:
1
0h
RW
HNPCap:
RSP/HNP Capability: The terminology RSP is used when the core is operating
in SS mode, and HNP is used when the core is operating in non-SS mode. The
application uses this bit to control the DWC_usb3 core's RSP/HNP capabilities. n 1'b0:
RSP/HNP capability is not enabled. n 1'b1: RSP/HNP capability is enabled. Note: This bit
is writable only if RSP/HNP mode is specified for Mode of Operation in coreConsultant,
that is when DWC_USB3_EN_OTG != 0 and DWC_USB3_MODE = DRD. If RSP/HNP
mode is not specified, this bit is Read Only, and is set to 1'b0.
0
0h
RW
SRPCap:
SRP Capability: The application uses this bit to control the DWC_usb3 core's
SRP capabilities. n 1'b0: SRP capability is not enabled. n 1'b1: SRP capability is enabled.
If this bit is not set for B-device, it cannot request the connected A-device (host) to
activate Vbus and start a session. If this bit is not set for A-device, it cannot detect the
SRP from B-device (device) to activate Vbus and start a session. Note: This bit is
writable only if OTG is enabled in coreConsultant (DWC_USB3_EN_OTG !=0). If OTG is
not enabled, then this bit is Read Only and is set to 1'b0.
Bit
Range
Default &
Access
Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
BAR Type:
PCI Configuration Register (Size: 32 bits)
BAR Reference:
[B:0, D:22, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0
RSVD0
Pe
ri
M
o
d
e
P
rtP
wrCtl
HNPR
eq
Se
sR
eq
Te
rm
S
el
D
LP
u
ls
e
Dev
S
et
HNPEn
Hst
S
et
HN
PE
n
Bit
Range
Default &
Access
Description
31:7
0h
RO
RSVD0:
reserved
6
1h
RW
PeriMode:
Peripheral Mode: Application uses this bit to program the core to work as a
peripheral or as a host. n 1'b0: The OTG device acts as a host n 1'b1: The OTG device
acts as a peripheral
5
0h
RW
PrtPwrCtl:
Port Power Control: Application sets this bit to initiate Vbus drive when it is
an A-device. The application should clearthis bit only if it wants to switch off the Vbus to
B-device. The core clears this bit in the following conditions: n Transition from any state
to A-IDLE state defined in OTG2.0 state machine. n When AIDL_BDIS_TOUT occurs in
A_SUSPEND n When A_WAIT_BCON_TOUT occurs in A_WAIT_BCON n Transition to any
B- state defined in OTG2.0 state machine
4
0h
RW
HNPReq:
HNP Request: n 1'b0: No HNP request n 1'b1: HNP request The application
sets this bit to initiate a HNP request to the connected USB host. The application clears
this bit by writing a 1'b0 when either of the following is detected: n
OEVT.OTGBDevBHostEndEvnt n OEVT.OTGBDevVBusChngEvnt