Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
2669
Default: 0F04h
20.5.3
CMD—Offset 4h
Command
Access Method
Default: 0000h
15
12
8
4
0
0
0
0
0
1
1
1
1
0
0
0
0
0
1
0
0
DID
Bit 
Range
Default & 
Access
Description
15:0
0f04h
RO
DID: 
Device ID: This field identifies the particular device. DID[15:7] indicates SoC, 
DID[6:1]=6'b000010 indicates HDAudio device, DID[0] comes from fuse indicates 
HDAudio SKU
Type: 
PCI Configuration Register
(Size: 16 bits)
CMD: 
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Re
se
rv
ed
ID
FBE
SE
N
WCC
PER
VG
S
MWI
SC
E
BME
MSE
IOS
Bit 
Range
Default & 
Access
Description
15:11
0000h
RO
Reserved: 
Reserved
10
0h
RW
ID: 
Interrupt Disable
9
0h
RO
FBE: 
Fast back to back enable. Not implemented.
8
0h
RW
SEN: 
SERR enable
7
0h
RO
WCC: 
Wait Cycle Control. Not implemented.
6
0h
RW
PER: 
Parity error response. Not implemented.
5
0h
RO
VGS: 
VGA Pallete Snoop. Not implemented.
4
0h
RO
MWI: 
Memory write and invalidate enable. Not implemented.
3
0h
RO
SCE: 
Special cycle enable. Not implemented.
2
0h
RW
BME: 
Bus master enable