Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
2670
Datasheet
20.5.4
STS—Offset 6h
Status
Access Method
Default: 0010h
1
0h
RW
MSE: 
Memory space enable
0
0h
RO
IOS: 
I/O space enabled. Not implemented.
Bit 
Range
Default & 
Access
Description
Type: 
PCI Configuration Register
(Size: 16 bits)
STS: 
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
DPE
S
E
RRS
RMA
RT
A
ST
A
DE
V
T
MDPE
FBC
Re
se
rv
ed
C66
CLIS
T
IS
Re
se
rv
ed
_
1
Bit 
Range
Default & 
Access
Description
15
0h
RO
DPE: 
Detected parity error. Not implemented.
14
0h
RO
SERRS: 
SERR Status
13
0h
WOC
RMA: 
Recieved master abort
12
0h
RO
RTA: 
Recieved target abort. Not implemented.
11
0h
RO
STA: 
Signaled target abort. Not implemented.
10:9
0h
RO
DEVT: 
DEVSEL timing status. Not implemented.
8
0h
RO
MDPE: 
Master data parity error. Not implemented.
7
0h
RO
FBC: 
Fast back to back capable. Not implemented.
6
0h
RO
Reserved: 
Reserved
5
0h
RO
C66: 
66MHz capable. Not implemented.
4
1h
RO
CLIST: 
Capabilities list exist
3
0h
RO
IS: 
Interrupt Status. Shows legacy interrupt signal status. Doesn't apply to MSI.