Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2682
Datasheet
20.5.29
MMC—Offset 62h
MSI Message Control
Access Method
Default: 0080h
20.5.30
MMLA—Offset 64h
MSI Lower Address
Access Method
Default: 00000000h
15
12
8
4
0
0
1
1
1
0
0
0
0
0
0
0
0
0
1
0
1
NEXT
C
A
P
CA
PI
D
Bit
Range
Default &
Access
Description
15:8
70h
RO
NEXTCAP:
Next Capability. The value of this field depends on the TM1.HAPD bit. When
TM1.HAPD is 0, this field has a value of 70h where it points to the PCI Express capability
structure. When TM1.HAPD bit is 1, this field has a value of 00h to indicate that this is
the last capability structure in the list.
7:0
05h
RO
CAPID:
Capability ID.
Type:
PCI Configuration Register
(Size: 16 bits)
MMC:
15
12
8
4
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
Re
se
rv
ed
AD
D64
MM
E
MMC
ME
Bit
Range
Default &
Access
Description
15:8
0h
RO
Reserved:
Reserved
7
1h
RO
ADD64:
64-bit Address support
6:4
0h
RO
MME:
Multiple Message Enable
3:1
0h
RO
MMC:
Multiple Message Capable
0
0h
RW
ME:
MSI Enable (ME): If set to 1 an MSI will be generated instead of an INTx# signal. If
set to 0, an MSI may not be generated.
Type:
PCI Configuration Register
(Size: 32 bits)
MMLA: