Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2706
Datasheet
20.6.7
WAKEEN—Offset Ch
Wake Enable
Access Method
Default: 00h
Type:
Memory Mapped I/O Register
(Size: 8 bits)
WAKEEN:
AZLBAR Type:
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference:
[B:0, D:27, F:0] + 10h
7
4
0
0
0
0
0
0
0
0
0
RESE
RVED
0
SD
IN_W
AK
E_ENA
B
LE_FLA
GS
Bit
Range
Default &
Access
Description
7:4
0h
RO
RESERVED0:
reserved
3:0
0h
RW
SDIN_WAKE_ENABLE_FLAGS:
Bits which control which SDI signal s may generate a
wake event. A 1 bit in the bit mask indicates that the associated SDIN signal is enabled
to generate a wake.