Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
2735
20.6.41
ISD0FMT—Offset 92h
Input Stream Descriptor 0 Format
Access Method
Default: 0000h
Bit 
Range
Default & 
Access
Description
15:0
00h
RW
FIFO_SIZE: 
Indicates the maximum number of bytes that could be revicted by the 
controller at one time. This is the maximum number of bytes that may have been 
received from the link but not yet DMA d into memory and is also the maximum possible 
value that the PICB count will increase by at one time. The FIFO size is calculated based 
on factors including the stream format programmed in ISD0FMT register. As the default 
value is zero, SW must write to the respective ISD0FMT register to kick of the FIFO size 
calculation, and read back to find out the HW allocated FIFO size.
Type: 
Memory Mapped I/O Register
(Size: 16 bits)
ISD0FMT: 
AZLBAR Type: 
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference: 
[B:0, D:27, F:0] + 10h
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RES
E
RVE
D
0
SA
MPL
E
_
B
A
S
E
_
R
A
TE
SAMP
LE_B
A
S
E
_R
A
T
E
_
MUL
T
IP
LE
SA
MPL
E
_B
ASE
_R
A
T
E
_
D
IV
ISO
R
RES
E
RVE
D
1
BIT
S
_PER_S
AMP
LE
NU
MBER_OF_CH
ANNELS
Bit 
Range
Default & 
Access
Description
15
0h
RO
RESERVED0: 
reserved
14
0h
RW
SAMPLE_BASE_RATE: 
Sample Base Rate (BASE): 0=48kHz 1=44.1kHz
13:11
0h
RW
SAMPLE_BASE_RATE_MULTIPLE: 
Sample Base Rate Multiple (MULT): 000=48kHz/
44.1kHz or less 001=x2 96kHz 88.2kHz 32kHz 010=x3 144kHz 011=x4 192kHz 
176.4kHz 100-111 Reserved
10:8
0h
RW
SAMPLE_BASE_RATE_DIVISOR: 
Sample Base Rate Divisor (DIV): 000 Divide by 1, 
48kHz 44.1kHz 001 Divide by 2, 24kHz 22.05kHz 010 Divide by 3, 16kHz 32kHz 011 
Divide by 4, 11.025kHz 100 Divide by 5, 9.6kHz 101 Divide by 6, 8kHz 110 Divide by 7 
111 Divide by 8, 6kHz
7
0h
RO
RESERVED1: 
reserved