Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2750
Datasheet
Access Method
Default: 0000h
20.6.59
ISD2FMT—Offset D2h
Input Stream Descriptor 2 Format
Access Method
Default: 0000h
Type:
Memory Mapped I/O Register
(Size: 16 bits)
AZLBAR Type:
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference:
[B:0, D:27, F:0] + 10h
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FIFO_SIZE
Bit
Range
Default &
Access
Description
15:0
00h
RW
FIFO_SIZE:
Indicates the maximum number of bytes that could be revicted by the
controller at one time. This is the maximum number of bytes that may have been
received from the link but not yet DMA d into memory and is also the maximum possible
value that the PICB count will increase by at one time. The FIFO size is calculated based
on factors including the stream format programmed in ISD2FMT register. As the default
value is zero, SW must write to the respective ISD2FMT register to kick of the FIFO size
calculation, and read back to find out the HW allocated FIFO size.
Type:
Memory Mapped I/O Register
(Size: 16 bits)
ISD2FMT:
AZLBAR Type:
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference:
[B:0, D:27, F:0] + 10h
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RE
SE
RVED0
SA
M
P
LE
_
B
A
S
E
_
R
A
T
E
S
A
MPLE_BASE
_
RA
TE
_M
UL
TIPLE
SAMP
LE
_
B
A
S
E
_
R
A
T
E
_
D
IVIS
O
R
RE
SE
RVED1
BIT
S
_PE
R
_SAMPLE
NUMBER_OF_CH
ANNELS
Bit
Range
Default &
Access
Description
15
0h
RO
RESERVED0:
reserved