Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2751
20.6.60
ISD2BDLPLBA—Offset D8h
Input Stream Descriptor 2 Buffer Descriptor List Pointer Lower Base Address
Access Method
Default: 00000000h
14
0h
RW
SAMPLE_BASE_RATE:
Sample Base Rate (BASE): 0=48kHz 1=44.1kHz
13:11
0h
RW
SAMPLE_BASE_RATE_MULTIPLE:
Sample Base Rate Multiple (MULT): 000=48kHz/
44.1kHz or less 001=x2 96kHz 88.2kHz 32kHz 010=x3 144kHz 011=x4 192kHz
176.4kHz 100-111 Reserved
10:8
0h
RW
SAMPLE_BASE_RATE_DIVISOR:
Sample Base Rate Divisor (DIV): 000 Divide by 1,
48kHz 44.1kHz 001 Divide by 2, 24kHz 22.05kHz 010 Divide by 3, 16kHz 32kHz 011
Divide by 4, 11.025kHz 100 Divide by 5, 9.6kHz 101 Divide by 6, 8kHz 110 Divide by 7
111 Divide by 8, 6kHz
7
0h
RO
RESERVED1:
reserved
6:4
0h
RW
BITS_PER_SAMPLE:
Bits per Sample (BITS): 000=8 bits. The data will be packed in
memory in 8 bit containers on 16 bit boundaries 001=16 bits. The data will be packed in
memory in 16 bit containers on 16 bit boundaries 010=20 bits. The data will be packed
in memory in 32 bit containers on 32 bit boundaries 011=24 bits. The data will be
packed in memory in 32 bit containers on 32 bit boundaries 100=32 bits. The data will
be packed in memory in 32 bit containers on 32 bit boundaries 101-111 Reserved
3:0
0h
RW
NUMBER_OF_CHANNELS:
Number of channels in each frame of the stream 0000=1
0001=2 1111=16
Bit
Range
Default &
Access
Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
ISD2BDLPLBA:
AZLBAR Type:
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference:
[B:0, D:27, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BUFFER_DE
SCRIPT
OR_LIST
_
LO
WER_BA
S
E
_ADD
RES
S
RES
E
RV
ED0
PR
O
T
EC
T