Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
2765
20.6.77
OSD0FMT—Offset 112h
Output Stream Descriptor 0 Format
Access Method
Default: 0000h
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FIFO
_SIZE
Bit 
Range
Default & 
Access
Description
15:0
00h
RW
FIFO_SIZE: 
Indicates the maximum number of bytes that could be fetched by the 
controller at one time. This is the maximum number of bytes that may have been DMA d 
into memory but not yet transmitted on the link and is also the maximum possible value 
that the PICB count will increase by at one time. The FIFO size is calculated based on 
factors including the stream format programmed in OSD0FMT register. As the default 
value is zero, SW must write to the OSD0FMT register to kick of the FIFO size calculation 
and read back to find out the HW allocated FIFO size.
Type: 
Memory Mapped I/O Register
(Size: 16 bits)
OSD0FMT: 
AZLBAR Type: 
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference: 
[B:0, D:27, F:0] + 10h
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RES
E
RV
ED0
SAM
PL
E_B
A
S
E
_R
A
T
E
SAMP
LE_B
A
S
E
_R
A
T
E
_
MUL
T
IPL
E
SAMPLE_
B
ASE_RA
T
E
_DIVISOR
RES
E
RV
ED1
BIT
S
_PER_S
AMPLE
NU
MBER_OF_CH
ANNELS
Bit 
Range
Default & 
Access
Description
15
0h
RO
RESERVED0: 
reserved
14
0h
RW
SAMPLE_BASE_RATE: 
Sample Base Rate (BASE): 0=48kHz 1=44.1kHz
13:11
0h
RW
SAMPLE_BASE_RATE_MULTIPLE: 
Sample Base Rate Multiple (MULT): 000=48kHz/
44.1kHz or less 001=x2 96kHz 88.2kHz 32kHz 010=x3 144kHz 011=x4 192kHz 
176.4kHz 100-111 Reserved