Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
2774
Datasheet
20.6.88
OSD1BDLPUBA—Offset 13Ch
Output Stream Descriptor 1 Buffer Descriptor List Pointer Upper Base Address
Access Method
Default: 00000000h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
B
U
FFE
R_DES
C
RIPT
OR
_
LIST_L
O
W
E
R_BA
SE_A
DDRE
S
S
RE
S
E
R
V
E
D
0
PRO
T
EC
T
Bit 
Range
Default & 
Access
Description
31:7
0h
RW
BUFFER_DESCRIPTOR_LIST_LOWER_BASE_ADDRESS: 
Lower address of the 
Buffer Descriptor List. This value should only be modified when the RUN bit is 0 or DMA 
transfers may be corrupted. Intel Reserved comment This field becomes WO and 0 s will 
be read when the Protect bit is set to 1.
6:1
00h
RO
RESERVED0: 
reserved
0
0h
RW
PROTECT: 
When this bit is set to 1 bits 31 7 0 of this register are WO and will return 0 
s when read. When this bit is cleared to 0 bits 31 7 0 are RW. Note that this bit can only 
be changed when all four bytes of this register are written in a single write operation. If 
less than four bytes are written this bit retains its previous value. This bit is Intel 
Reserved.
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
OSD1BDLPUBA: 
AZLBAR Type: 
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference: 
[B:0, D:27, F:0] + 10h