Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
2820
Datasheet
Default: 00100000h
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
STATUSCOMMAND: 
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Re
se
rv
ed
0
RMA
RCA
Re
se
rv
ed
1
CA
PL
IS
T
INTR_S
TA
TUS
Re
se
rv
ed
2
Re
se
rv
ed
3
IN
T
R
_DISABLE
Re
se
rv
ed
4
SE
R
R
_
E
N
AB
LE
Re
se
rv
ed
5
BME
MS
E
Re
se
rv
ed
6
Bit 
Range
Default & 
Access
Description
31:30
0h
RO
Reserved0: 
reserved
29
0h
RW/1C
RMA: 
Received Master Abort: Not Implemented
28
0h
RW/1C
RCA: 
Received Target Abort: Not Implemented
27:21
00h
RO
Reserved1: 
reserved
20
1h
RO
CAPLIST: 
Capabilities List: Indicates that the controller contains a capabilities pointer 
list. The first item is pointed to by looking at the configuration offset 34h.
19
0h
RO
INTR_STATUS: 
Interrupt Status: This bit reflects state of interrupt in the device Only 
when the Interrupt Disable bit in the command register is a 0 and this Interrupt Status 
bit is a 1, is the device/function interrupt message sent. Setting the Interrupt Disable bit 
to a 1 has no effect on the state of this bit. This bit reflects Legacy interrupt status.
18:16
0h
RO
Reserved2: 
reserved
15:11
00h
RO
Reserved3: 
reserved
10
0h
RW
INTR_DISABLE: 
Setting this bit disables INTx assertion from Bridge. The interrupt 
disabled is legacy INTx# interrupt, which is the Bridge does not send Interrupt Assert 
message through the IOSF Sideband Channel. Reset value of this bit is 0. This bit has no 
connection with the interrupt status bit
9
0h
RO
Reserved4: 
reserved
8
0h
RW
SERR_ENABLE: 
not implemented
7:3
00h
RO
Reserved5: 
reserved
2
0h
RW
BME: 
If this bit is 0,the Bridge does not generate any new upstream transaction on 
IOSF as a master. Reset value of this bit is 0.
1
0h
RW
MSE: 
Memory Space Enable: This bit controls Bridge response to downstream memory 
accesses. When set, accesses to memory space of the device is enabled. Reset value of 
this bit is 0.
0
0h
RO
Reserved6: 
reserved