Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2835
21.10.12 reg_PMECTRLSTATUS_type (PMECTRLSTATUS)—Offset 84h
reserved
Access Method
Default: 00000008h
21.10.13 reg_MANID_type (MANID)—Offset F8h
Manufacturers ID
15:8
00h
RO
NXTCAP:
Points to the next capability structure. This points to NULL
7:0
01h
RO
POWER_CAP:
Indicates this is power management capability.
Bit
Range
Default &
Access
Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
Re
se
rv
ed
0
PM
E
S
TA
T
U
S
Re
se
rv
ed
1
PME
E
NA
BLE
Re
se
rv
ed
2
NO_SOF
T_RESET
Re
se
rv
ed
3
PO
WE
RST
A
TE
Bit
Range
Default &
Access
Description
31:16
0000h
RO
Reserved0:
reserved
15
0h
RW/1C
PMESTATUS:
0 Software clears the bit by writing a 1 to it. 1 This bit is set when the
PME# signal is asserted independent of the state of the PME Enable bit
14:9
00h
RO
Reserved1:
reserved
8
0h
RW
PMEENABLE:
pme enable
7:4
0h
RO
Reserved2:
reserved
3
1h
RO
NO_SOFT_RESET:
This bit indicates that devices transitioning from D3hot to D0
because of Powerstate commands do not perform an internal reset.Configuration
Context is preserved.
2
0h
RO
Reserved3:
reserved
1:0
0h
RW
POWERSTATE:
This field is used both to determine the current power state and to set
a new power state.[BR]The values are: 00 D0 state 11 D3HOT state Others Reserved
Note: If the software attempts to write a value of 01b or 10b in to this field, the write
operation must complete normally. The data is discarded and no state change occurs.
Note: When in the D3HOT states, interrupts are blocked. D3Hot cannot be used for
downstream decode on fabric ports.