Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2861
21.11.30 reg_SSP0_DIV_CTRL_type (SSP0_DIV_CTRL)—Offset E8h
SSP0 M/N Clock Divider control - Add for VLV
Access Method
Default: 8000000100000001h
7
0b
RO
Reserved (RSVD):
Reserved.
6
0b
RO
Reserved (RSVD):
Reserved.
5
0b
RO
Reserved (RSVD):
Reserved.
4
0b
RO
Reserved (RSVD):
Reserved.
3
0b
RO
Reserved (RSVD):
Reserved.
2:0
0b
RO
RSVD2:
Reserved
Bit
Range
Default &
Access
Description
Type:
Memory Mapped I/O Register
(Size: 64 bits)
SSP0_DIV_CTRL:
BAR Type:
PCI Configuration Register (Size: 32 bits)
BAR Reference:
[B:0, D:21, F:0] + 10h
6
3
6
0
5
6
5
2
4
8
4
4
4
0
3
6
3
2
2
8
2
4
2
0
1
6
1
2
8
4
0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Di
vid
er_
Bypas
s
Di
vider_
En
Divi
der
_
Upd
ate
RS
VD0
Di
vid
er_
M
RS
VD1
Divi
der
_
N
Bit
Range
Default &
Access
Description
63
1b
RW
Divider_Bypass:
SSP0 Bypass divider
62
0b
RW
Divider_En:
SSP0 Enable divider
61
0b
RW
Divider_Update:
SSP0 Update divider
60:52
0b
RO
RSVD0:
Reserved
51:32
1b
RW
Divider_M:
SSP0 Nominator value
31:20
0b
RO
RSVD1:
Reserved
19:0
1b
RW
Divider_N:
SSP0 Denominator value