Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2876
Datasheet
21.12.14 SSP Slot Frame Counter Register[0-7] (FRAME_CNT[0-7])—
Offset 48h, Count 8, Stride 4h
The slot frame counter is typically used in Audio modes and increments the counter
every two SSPSCLKs. This allows the OS to check the progress of a transfer. Since the
SSP can support upto 8 slots in network mode there are 8 slot frame counters.
Access Method
Default: 00000000h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
RSVD
0
FRA
M
E
_
SEL
Bit
Range
Default &
Access
Description
31:4
0b
RO
RSVD0:
Reserved
3:0
0001b
RW
Frame Select Enable (FRAME_SEL):
Each bit in this field corresponds to a frame
signal of the SSP Controller. Not all SSP controllers have all frame selects pinned out so
consult the pin list for indication of which SSP controllers support how many frame
signals. [Bit 0] Frame Select 0 Master and Slave Supported [Bit 1] Frame Select 1
Master Only [Bit 2] Frame Select 2 Master Only [Bit 3] Frame Select 3 Master Only 0 =
Frame Select Disabled 1 = Frame Select Enabled
Type:
Memory Mapped I/O Register
(Size: 32 bits)
FRAME_CNT[0-7]:
BAR Type:
PCI Configuration Register (Size: 32 bits)
BAR Reference:
[B:0, D:21, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FC
NT
_
E
N
RSV
D
0
FCNT_RST
FCN
T
Bit
Range
Default &
Access
Description
31
0b
RW
Slot Frame Count Enable (FCNT_EN):
0 = Disable frame counter. 1 = Enable frame
counter.
30:25
0b
RO
RSVD0:
Reserved
24
0b
WO
Slot Frame Count Reset (FCNT_RST):
SSP frame counter reset. Writing a 1 to this
bit clears the frame counter.
23:0
000000h
RO
Slot Frame Count (FCNT):
SSP frame count.