Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
2882
Datasheet
21.12.22 ASRC Timer Snapshot (ASRC_SNPSHT)—Offset 84h
Frame Snapshot Register
Access Method
Default: 00000000h
21.12.23 ASRC Frame Count (ASRC_FRMCNT)—Offset 88h
Frame Count Register
Access Method
Default: 00000000h
Bit 
Range
Default & 
Access
Description
31:16
0b
RO
RSVD0: 
Reserved
15:0
0000h
RW
ASRC Frame Threshold (ASRC_FTC): 
The 16 bit frame threshold value needs to be 
written here. Every time the frame count matches the frame threshold a snapshot of the 
free running timer will be taken and stored in the snapshot register. An interrupt will be 
generated as well. If the frame threshold is changed on the fly during operation then the 
following behavior is expected. Previous value = A, New value value = B If B ) A : The 
frame counter keeps counting up to the new value. Nothing happens when the frame 
counter reaches the old value of A. If B ( A : The frame counter resets to zero on the 
next frame. No interrupt or snapshot is generated in this case.
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
ASRC_SNPSHT: 
BAR Type: 
PCI Configuration Register (Size: 32 bits)
BAR Reference: 
[B:0, D:21, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
AS
RC
_T
IME
R
_SNAP
S
H
O
T
Bit 
Range
Default & 
Access
Description
31:0
00000000h
RO
ASRC Frame Snapshot (ASRC_TIMER_SNAPSHOT): 
This field holds the 32 bit 
snapshot value. The value is noted on the clock cycle when the frame threshold matches 
the frame count.
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
ASRC_FRMCNT: 
BAR Type: 
PCI Configuration Register (Size: 32 bits)
BAR Reference: 
[B:0, D:21, F:0] + 10h