Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
303
12.3.19
MISRCCCLR (MISRCCCLR)—Offset 31h
MISR CMD/CTRL Clear
Access Method
Default: 00000000h
12.3.20
MISRDDCLR (MISRDDCLR)—Offset 32h
MISR DM/DQ Clear
Access Method
Default: 00000000h
Bit
Range
Default &
Access
Field Name (ID): Description
31:0
0h
RO
PGTBLVLD:
Reflects the open page table entries (4 Ranks x 8 Banks)
Type:
Message Bus Register
(Size: 32 bits)
Offset:
Op Codes:
h - Read, h - Write
h - Read, h - Write
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MIS
R
CCC
LR
Bit
Range
Default &
Access
Field Name (ID): Description
31:0
0h
WO
MISRCCCLR (MISRCCCLR):
Writing any value to this address will reset the MISRCC
Signature register value to all Fs.
Type:
Message Bus Register
(Size: 32 bits)
Offset:
Op Codes:
h - Read, h - Write
h - Read, h - Write
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MISRDD
C
LR
Bit
Range
Default &
Access
Field Name (ID): Description
31:0
0h
WO
MISRDDCLR (MISRDDCLR):
Writing any value to this address will reset the MISRDD
Signature register value to all Fs.