Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
309
12.3.31
DSCRMSEED (DSCRMSEED)—Offset 80h
Dynamic data scrambler seed register ERRATA Reading this register returns the bit
fields in reverse order SCRMSEED[31:14], 13'h0, SCRMDIS[0]
Access Method
Default: 00000000h
12.3.32
DSCRMLO (DSCRMLO)—Offset 81h
Dynamic data scrambler pattern low register.
Access Method
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FU
SE
ST
A
T
Bit
Range
Default &
Access
Field Name (ID): Description
31:0
0h
RO
FUSESTAT:
Dunit fuse bits are captured into this register and is available for read [0]
fus_dun_ecc_dis. [3:1] fus_dun_max_supporte_memory[2:0]. [5:4]
fus_dun_max_devden[1:0] [6] fus_dun_dimm2_dis [7] fus_dun_rank2_dis [8]
fus_dun_ooo_dis [9] fus_dun_memx8_dis [10] fus_dun_memx16_dis [11]
fus_dun_bc4_dis [12] fus_dun_1n_dis [13] fus_dun_dq_scrambler_dis [15:14] Rsvd
[16] fus_dun_32bit_dram_ifc [31:17] Rsvd
Type:
Message Bus Register
(Size: 32 bits)
Offset:
Op Codes:
h - Read, h - Write
h - Read, h - Write
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SC
RMDIS
Rsvd_30_18_SCRMSEE
D
SC
RMSEE
D
Bit
Range
Default &
Access
Field Name (ID): Description
31
0h
RW
SCRMDIS:
Scrambler Disable 0 - Enables scrambler 1 - Disables scrambler Note: This
bit has no impact with Scrambler is disabled by fuse
30:18
0h
RO
Rsvd_30_18_SCRMSEED:
Reserved
17:0
0h
RW
SCRMSEED:
Holds 18 bit scrambler seed value used to feed into LFSR array matrix.