Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
372
Datasheet
13.6.23
TTS—Offset 83h
VLV Bandwidth Trip Thresholds
Access Method
Default: 00000000h
13.6.24
TELB—Offset 84h
Thermal Enforcement Limits for Bandwidth Trips
Access Method
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:16
0h
RO
RESERVED_1: 
Reserved
15:8
0h
RW
WR_THRESHOLD: 
Write Threshhold (W): Indicates (in absence of a thermal sensor) a 
threshold to initiate a trip for the throttle mechanism. This value will be compared 
against the total Rank0 Write count from the event counters when there is no external 
thermal sensor configured for DRAM protection.
7:0
0h
RW
RD_THRESHOLD: 
Read Threshhold (R): Indicates (in absence of a thermal sensor) a 
threshold to initiate a trip for the throttle mechanism. This value will be compared 
against the total Rank0 Read count from the event counters when there is no external 
thermal sensor configured for DRAM protection
Type: 
Message Bus Register
(Size: 32 bits)
Offset: 
Op Codes:
h - Read, h - Write
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RE
SE
RVED_1
WR_THRE
S
HOLD
RD
_
T
H
R
ES
HO
LD
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:16
0h
RO
RESERVED_1: 
Reserved
15:8
0h
RW
WR_THRESHOLD: 
Write Threshold: Indicates a threshold to initiate a trip for the 
throttle mechanism. This value will be compared against the total Write count FOR BOTH 
RANKS from the event counters when there is no iternal thermal sensor configured for 
VLV protection.
7:0
0h
RW
RD_THRESHOLD: 
Read Threshold: Same as Write Threshold but for Reads from BOTH 
RANKS.
Type: 
Message Bus Register
(Size: 32 bits)
Offset: 
Op Codes:
h - Read, h - Write