Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
385
13.6.36
TE_AUX1—Offset B6h
Thermal Event Aux1
Access Method
Default: 00000000h
Type: 
Message Bus Register
(Size: 32 bits)
Offset: 
Op Codes:
h - Read, h - Write
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RESE
RVE
D
_1
SLM1_P
R
O
CHO
T
_E
NABLE
SLM0_P
R
O
CHO
T
_E
NABLE
XX
P
R
O
C
H
O
T
_
EN
A
B
LE
RESE
RVE
D
_5
Ass
ert
_A
PI
CA
RESE
RVE
D
_7
MSI
_
E
N
ABLE
SMI
_
ENA
B
LE
SCI
_
ENA
B
LE
SA
TA
_T
H
R
O
TT
LE
_
ENA
B
LE
RESE
RVE
D
_12
GF
X_
V
N
N_
T
H
R
O
T
GF
X
_
T
M
2_
E
N
ABL
E
GF
X
_
T
M
1_
E
N
ABL
E
B
W
_T
HRO
T
_E
NABLE
D
D
R_REFRE
S
H_E
N
ABLE
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:19
0h
RW
RESERVED_1: 
Reserved
18
0h
RW
SLM1_PROCHOT_ENABLE: 
SLM1 PROCHOT Enable(Reserved for VLV)
17
0h
RW
SLM0_PROCHOT_ENABLE: 
SLM0 PROCHOT Enable
16
0h
RW
XXPROCHOT_ENABLE: 
XXPROCHOT Note: Unless in debug mode enable XXPROCHOT 
with caution because XXPROCHOT feedsback into SoC via the Bi-Directional IO and 
could cause XXPROCHOT to trip as well
15
0h
RW
RESERVED_5: 
Reserved
14
0h
RW
Assert_APICA: 
Assert_APICA Enable
13:12
0h
RW
RESERVED_7: 
Reserved
11
0h
RW
MSI_ENABLE: 
MSI Enable
10
0h
RW
SMI_ENABLE: 
SMI Enable
9
0h
RW
SCI_ENABLE: 
SCI Enable
8
0h
RW
SATA_THROTTLE_ENABLE: 
SATA Throttle Enable
7:5
0h
RO
RESERVED_12: 
Reserved