Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
426
Datasheet
14.9.10
SSID_SID—Offset 2Ch
This register is used to uniquely identify the subsystem where the PCI device resides.
Access Method
Default: 00000000h
14.9.11
CAPPOINT—Offset 34h
This register points to a linked list of capabilities implemented by this device.For VV, the
capability linked list is expected to be : (Head-34, PMCAP-D0, MSI-90, VID-B0,
..End)Old : (Head-34, PMCAP-D0, MSI-90, AFLC-A4, VID-B0, .. End)
Access Method
Default: 000000D0h
0
1b
RO
RESOURCE_TYPE_RTE (RESOURCE_TYPE_RTE_3):
Indicates a request for I/O
space
Bit
Range
Default &
Access
Description
Type:
PCI Configuration Register
(Size: 32 bits)
SSID_SID:
Power Well:
Core
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SUB
ID
_
1
SU
BV
ID_0
Bit
Range
Default &
Access
Description
31:16
0000h
RW/O
SUBID (SUBID_1):
This value is used to identify the vendor of the subsystem. This
register should be programmed by BIOS during boot-up. Once written, this register
becomes Read_Only. This register can only be cleared by a Reset.
15:0
0000h
RW/O
SUBVID (SUBVID_0):
This value is used to identify the vendor of the subsystem. This
register should be programmed by BIOS during boot-up. Once written, this register
becomes Read_Only. This register can only be cleared by a Reset.
Type:
PCI Configuration Register
(Size: 32 bits)
CAPPOINT:
Power Well:
Core