Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
427
14.9.12
INTRLINE—Offset 3Ch
3C - Interrupt. This register is programmed by SBIOS. It is not used by the graphics/
display driver. This 8-bit register is used to communicate interrupt line routing 
information. It is read/write and must be implemented by the device. POST software 
will write the routing information into this register as it initializes and configures the 
system. SOXi Context Save/Restore : Yes The value in this register tells which input of 
the system interrupt controller(s) the device?s interrupt pin is connected to. The device 
itself does not use this value, rather it is used by device drivers and operating systems 
to determine priority and vector information. 3D - Interrupt. This register is 
programmed by SBIOS. It is not used by the graphics/display driver SOXi Context 
Save/Restore : Not required
Access Method
Default: 00000100h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 0 0
RSVD
_0
CA
PA
B
IL
IT
IES
_
PO
INT
ER
_
1
Bit 
Range
Default & 
Access
Description
31:8
000000h
RO
RSVD (RSVD_0): 
Reserved
7:0
D0h
RW/O
CAPABILITIES_POINTER (CAPABILITIES_POINTER_1): 
The first item in the 
capabilities list is at address D0h (PMCS). This register should be programmed by BIOS 
during boot-up. Once written, this register becomes Read_Only. This register can only 
be cleared by a Reset.
Type: 
PCI Configuration Register
(Size: 32 bits)
INTRLINE
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
RS
VD0
INT
E
RRUPT_P
IN_1
INTRLINE_0
Bit 
Range
Default & 
Access
Description
31:16
0b
RO
RSVD0: 
Reserved