Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
431
Default: 00000000h
14.9.17
PAVPC—Offset 74h
Protected Audio Video Control. Similar to IVB, BIOS will program this register for
Valleyview (not the Gfx Driver). SOXi Context Save/Restore : Yes. For Valleyview,
device 2 configuration accesses to 0x74 and Gfx MMIO accesses to 0x1082C0 will both
alias to the same register. This register will be located within Gunit.WOPCMBASE is
derived from : BDSMbase + GMS size - WOPCMSZ. Note : IVB currently derives from :
TOLUD + WOPCMSZ
Access Method
Default: 00000000h
Type:
PCI Configuration Register
(Size: 32 bits)
BGSM:
Power Well:
Core
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BGS
M
_0
R
SVD_1
BGSM_L
OCK_2
Bit
Range
Default &
Access
Description
31:20
000h
RW/L
BGSM (BGSM_0):
BGSM: Gfx Base of GTT Stolen Memory. This register contains bits
31 to 20 of the base address of GTT Table in stolen DRAM memory. BIOS determines the
base of GTT stolen memory by subtracting the GTT graphics stolen memory size (PCI
Device 2 offset 50 bits 9:8) from the Graphics Base of Data Stolen Memory (PCI Device
2 offset 5C bits 31:20). Signal : gvd_dsp_Cspgtbladdr_dczfwohdczfwoh[31:20].Note :
was 4KB aligned on CDV ie. [31:12]
19:1
00000h
RO
RSVD (RSVD_1):
Reserved
0
0b
RW/L
BGSM_LOCK (BGSM_LOCK_2):
This bit will lock all writeable settings in this register
including itself
Type:
PCI Configuration Register
(Size: 32 bits)
Power Well:
Core
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RSVD
_0
RSVD
_1
RSVD
_2
WO
PC
M
S
Z
_
3
OV
TA
TT
A
C
K
_
4
HV
Y
M
OD
S
E
L_5
PA
V
PL
O
C
K
_
6
PA
V
PE
_
7
PC
ME_8