Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
456
Datasheet
14.10.10 FCR (FCR_Read)—Offset 3CAh
Feature Control
Access Method
Default: 00h
7
4
0
0
0
0
0
0
0
0
0
PA
LE
TT
E
_
D
A
TA
Bit
Range
Default &
Access
Field Name (ID): Description
7:0
0b
RW
PALETTE_DATA:
This byte-wide data port provides read or write access to the three
bytes of data of each color data position selected using the Palette Read Index Register
(DACRX) or the Palette Write Index Register (DACWX).
The three bytes in each color data position are read or written in three successive read
or write operations. The first byte read or written specifies the intensity of the red
component of the color specified in the selected color data position. The second byte is
for the green component, and the third byte is for the blue component. When writing
data to a color data position, all three bytes must be written before the hardware will
actually update the three bytes of the selected color data position.
When reading or writing to a color data position, ensure that neither the Palette Read
Index Register (DACRX) or the Palette Write Index Register (DACWX) are written to
before all three bytes are read or written. A write to either of these two registers causes
the circuitry that automatically cycles through providing access to the bytes for red,
green and blue components to be reset such that the byte for the red component is the
one that will be accessed by the next read or write operation via this register. This
register allows access to the palette even when running non-VGA display modes. Writes
to the palette can cause sparkle if not done during inactive video periods. This sparkle is
caused by an attempt to write and read the same address on the same cycle. Anti-
sparkle circuits will substitute the previous pixel value for the read output.
Type:
Memory Mapped I/O Register
(Size: 8 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h
7
4
0
0
0
0
0
0
0
0
0
RE
SER
V
ED
VS
Y
N
C_C
O
NTRO
L
RE
S
E
R
V
E
D
_
1
Bit
Range
Default &
Access
Field Name (ID): Description
7:4
0b
RW
RESERVED:
Read as 0.